The trend for semiconductor devices is smaller integrated circuit (IC) devices (also referred to as chips), packaged in smaller packages (which protect the chip while providing off chip signaling connectivity). One example are image sensors, which are IC devices that include photo-detectors which transform incident light into electrical signals (that accurately reflect the intensity and color information of the incident light with good spatial resolution).
One image sensor type is the front side illuminated (FSI) image sensor, which has photo-detectors formed on the silicon chip, over which circuitry is built up. Color filters and micro-lens are added on top of the circuitry. With FSI image sensors, the light passes through the layer(s) of circuitry before reaching the photo-detectors. One limitation of FSI image sensors is that the circuitry layer(s) limit the aperture of each pixel. As the pixel size shrinks due to demands for higher number of pixels and smaller chip sizes, the ratio of pixel area to the overall sensor area decreases, which reduces the quantum efficiency (QE) of the sensor.
Another type of image sensor is the back side illuminated (BSI) image sensor. The BSI image sensor is configured so that the light enters through the back (substrate side) of the chip. The light passes through the silicon substrate and to the photo-detectors, without having to pass through any circuitry layers. The advantage of BSI image sensors is that the circuitry layers are avoided and thus need not be formed with gaps sufficient to allow light to pass to each photo detector. However, as optical paths become shorter with the use of BSI sensors, the micro-lenses become thicker (i.e. to achieve shorter focal lengths for focusing in shorter distances.
Presently, chip-on-board (COB) and Shellcase Wafer Level CSP processes are the most dominant packaging and assembly processes for FSI image sensor architecture. However, as the market moves from FSI to BSI sensors, where the contact pads and imaging areas now disposed on the opposite sides of the chip/wafer, the COB and Shellcase WLCSP technologies will face substantial challenges in packaging and assembling such BSI sensors.